switchImplementation

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sources

 
 
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benchmark_test.go
func switchImplementation() int {
switch runtime.GOARCH {
case "amd64":
return 0
case "arm64":
return 1
case "arm":
return 2
}
 
return 0
}

AST

buildssa-enter
. AS l(8)
. . NAME-benchmark.~r0 a(true) g(1) l(8) x(0) class(PPARAMOUT) esc(no) int
buildssa-body
. SWITCH l(9) tc(1) string
. SWITCH-body
. . BLOCK l(14)
. . BLOCK-list
. . . IF l(14)
. . . . LITERAL-false l(14) tc(1) bool
. . . IF-body
. . . . GOTO l(14) benchmark..s2
 
. . . IF l(10)
. . . . LITERAL-true l(10) tc(1) bool
. . . IF-body
. . . . GOTO l(10) benchmark..s0
 
. . . IF l(12)
. . . . LITERAL-false l(12) tc(1) bool
. . . IF-body
. . . . GOTO l(12) benchmark..s1
 
. . BREAK l(9)
 
. . LABEL l(10) benchmark..s0
 
. . RETURN l(11) tc(1)
. . RETURN-list
. . . AS l(11) tc(1)
. . . . NAME-benchmark.~r0 a(true) g(1) l(8) x(0) class(PPARAMOUT) esc(no) int
. . . . LITERAL-0 l(11) tc(1) int
 
. . BREAK l(9)
 
. . LABEL l(12) benchmark..s1
 
. . RETURN l(13) tc(1)
. . RETURN-list
. . . AS l(13) tc(1)
. . . . NAME-benchmark.~r0 a(true) g(1) l(8) x(0) class(PPARAMOUT) esc(no) int
. . . . LITERAL-1 l(13) tc(1) int
 
. . BREAK l(9)
 
. . LABEL l(14) benchmark..s2
 
. . RETURN l(15) tc(1)
. . RETURN-list
. . . AS l(15) tc(1)
. . . . NAME-benchmark.~r0 a(true) g(1) l(8) x(0) class(PPARAMOUT) esc(no) int
. . . . LITERAL-2 l(15) tc(1) int
 
. . BREAK l(9)
 
. . BREAK l(9)
 
. RETURN l(18) tc(1)
. RETURN-list
. . AS l(18) tc(1)
. . . NAME-benchmark.~r0 a(true) g(1) l(8) x(0) class(PPARAMOUT) esc(no) int
. . . LITERAL-0 l(18) tc(1) int
buildssa-exit
 

start

  • b1:
    • v1 (?) = InitMem <mem>
    • v2 (?) = SP <uintptr>
    • v3 (?) = SB <uintptr>
    • v4 (?) = LocalAddr <*int> {~r0} v2 v1
    • v5 (?) = Const64 <int> [0]
    • v6 (?) = ConstBool <bool> [false]
    • v7 (?) = ConstBool <bool> [true]
    • v11 (?) = Const64 <int> [1]
    • v15 (?) = Const64 <int> [2]
  • If v6b4 b3 (14)
  • b2: ← b9
    • v19 (18) = Copy <mem> v1
    • v20 (18) = VarDef <mem> {~r0} v19
    • v21 (18) = Store <mem> {int} v4 v5 v20
  • Ret v21 (+18)
  • b3: ← b1
  • If v7b7 b6
  • b4: ← b1
  • Plainb5 (+14)
  • b5: ← b4
    • v16 (15) = Copy <mem> v1
    • v17 (15) = VarDef <mem> {~r0} v16
    • v18 (15) = Store <mem> {int} v4 v15 v17
  • Ret v18 (+15)
  • b6: ← b3
  • If v6b10 b9
  • b7: ← b3
  • Plainb8 (+10)
  • b8: ← b7
    • v8 (11) = Copy <mem> v1
    • v9 (11) = VarDef <mem> {~r0} v8
    • v10 (11) = Store <mem> {int} v4 v5 v9
  • Ret v10 (+11)
  • b9: ← b6
  • Plainb2 (+9)
  • b10: ← b6
  • Plainb11 (+12)
  • b11: ← b10
    • v12 (13) = Copy <mem> v1
    • v13 (13) = VarDef <mem> {~r0} v12
    • v14 (13) = Store <mem> {int} v4 v11 v13
  • Ret v14 (+13)

number lines [16978 ns]

  • b1:
    • v1 (?) = InitMem <mem>
    • v2 (?) = SP <uintptr>
    • v3 (?) = SB <uintptr>
    • v4 (?) = LocalAddr <*int> {~r0} v2 v1
    • v5 (?) = Const64 <int> [0]
    • v6 (?) = ConstBool <bool> [false]
    • v7 (?) = ConstBool <bool> [true]
    • v11 (?) = Const64 <int> [1]
    • v15 (?) = Const64 <int> [2]
  • If v6b4 b3 (+14)
  • b2: ← b9
    • v19 (18) = Copy <mem> v1
    • v20 (18) = VarDef <mem> {~r0} v19
    • v21 (+18) = Store <mem> {int} v4 v5 v20
  • Ret v21 (+18)
  • b3: ← b1
  • If v7b7 b6
  • b4: ← b1
  • Plainb5 (+14)
  • b5: ← b4
    • v16 (15) = Copy <mem> v1
    • v17 (15) = VarDef <mem> {~r0} v16
    • v18 (+15) = Store <mem> {int} v4 v15 v17
  • Ret v18 (+15)
  • b6: ← b3
  • If v6b10 b9
  • b7: ← b3
  • Plainb8 (+10)
  • b8: ← b7
    • v8 (11) = Copy <mem> v1
    • v9 (11) = VarDef <mem> {~r0} v8
    • v10 (+11) = Store <mem> {int} v4 v5 v9
  • Ret v10 (+11)
  • b9: ← b6
  • Plainb2 (+9)
  • b10: ← b6
  • Plainb11 (+12)
  • b11: ← b10
    • v12 (13) = Copy <mem> v1
    • v13 (13) = VarDef <mem> {~r0} v12
    • v14 (+13) = Store <mem> {int} v4 v11 v13
  • Ret v14 (+13)

early phielim [4597 ns]

  • b1:
    • v1 (?) = InitMem <mem>
    • v2 (?) = SP <uintptr>
    • v3 (?) = SB <uintptr>
    • v4 (?) = LocalAddr <*int> {~r0} v2 v1
    • v5 (?) = Const64 <int> [0]
    • v6 (?) = ConstBool <bool> [false]
    • v7 (?) = ConstBool <bool> [true]
    • v11 (?) = Const64 <int> [1]
    • v15 (?) = Const64 <int> [2]
  • If v6b4 b3 (+14)
  • b2: ← b9
    • v19 (18) = Copy <mem> v1
    • v20 (18) = VarDef <mem> {~r0} v1
    • v21 (+18) = Store <mem> {int} v4 v5 v20
  • Ret v21 (+18)
  • b3: ← b1
  • If v7b7 b6
  • b4: ← b1
  • Plainb5 (+14)
  • b5: ← b4
    • v16 (15) = Copy <mem> v1
    • v17 (15) = VarDef <mem> {~r0} v1
    • v18 (+15) = Store <mem> {int} v4 v15 v17
  • Ret v18 (+15)
  • b6: ← b3
  • If v6b10 b9
  • b7: ← b3
  • Plainb8 (+10)
  • b8: ← b7
    • v8 (11) = Copy <mem> v1
    • v9 (11) = VarDef <mem> {~r0} v1
    • v10 (+11) = Store <mem> {int} v4 v5 v9
  • Ret v10 (+11)
  • b9: ← b6
  • Plainb2 (+9)
  • b10: ← b6
  • Plainb11 (+12)
  • b11: ← b10
    • v12 (13) = Copy <mem> v1
    • v13 (13) = VarDef <mem> {~r0} v1
    • v14 (+13) = Store <mem> {int} v4 v11 v13
  • Ret v14 (+13)

early copyelim [1006 ns]

  • b1:
    • v1 (?) = InitMem <mem>
    • v2 (?) = SP <uintptr>
    • v3 (?) = SB <uintptr>
    • v4 (?) = LocalAddr <*int> {~r0} v2 v1
    • v5 (?) = Const64 <int> [0]
    • v6 (?) = ConstBool <bool> [false]
    • v7 (?) = ConstBool <bool> [true]
    • v11 (?) = Const64 <int> [1]
    • v15 (?) = Const64 <int> [2]
  • If v6b4 b3 (+14)
  • b2: ← b9
    • v19 (18) = Copy <mem> v1
    • v20 (18) = VarDef <mem> {~r0} v1
    • v21 (+18) = Store <mem> {int} v4 v5 v20
  • Ret v21 (+18)
  • b3: ← b1
  • If v7b7 b6
  • b4: ← b1
  • Plainb5 (+14)
  • b5: ← b4
    • v16 (15) = Copy <mem> v1
    • v17 (15) = VarDef <mem> {~r0} v1
    • v18 (+15) = Store <mem> {int} v4 v15 v17
  • Ret v18 (+15)
  • b6: ← b3
  • If v6b10 b9
  • b7: ← b3
  • Plainb8 (+10)
  • b8: ← b7
    • v8 (11) = Copy <mem> v1
    • v9 (11) = VarDef <mem> {~r0} v1
    • v10 (+11) = Store <mem> {int} v4 v5 v9
  • Ret v10 (+11)
  • b9: ← b6
  • Plainb2 (+9)
  • b10: ← b6
  • Plainb11 (+12)
  • b11: ← b10
    • v12 (13) = Copy <mem> v1
    • v13 (13) = VarDef <mem> {~r0} v1
    • v14 (+13) = Store <mem> {int} v4 v11 v13
  • Ret v14 (+13)

early deadcode [11844 ns]

  • b1:
    • v1 (?) = InitMem <mem>
    • v2 (?) = SP <uintptr>
    • v4 (?) = LocalAddr <*int> {~r0} v2 v1
    • v5 (?) = Const64 <int> [0]
    • v6 (?) = ConstBool <bool> [false]
    • v7 (?) = ConstBool <bool> [true]
    • v11 (?) = Const64 <int> [1]
    • v15 (?) = Const64 <int> [2]
  • If v6b4 b3 (+14)
  • b2: ← b9
    • v20 (18) = VarDef <mem> {~r0} v1
    • v21 (+18) = Store <mem> {int} v4 v5 v20
  • Ret v21 (+18)
  • b3: ← b1
  • If v7b7 b6
  • b4: ← b1
  • Plainb5 (+14)
  • b5: ← b4
    • v17 (15) = VarDef <mem> {~r0} v1
    • v18 (+15) = Store <mem> {int} v4 v15 v17
  • Ret v18 (+15)
  • b6: ← b3
  • If v6b10 b9
  • b7: ← b3
  • Plainb8 (+10)
  • b8: ← b7
    • v9 (11) = VarDef <mem> {~r0} v1
    • v10 (+11) = Store <mem> {int} v4 v5 v9
  • Ret v10 (+11)
  • b9: ← b6
  • Plainb2 (+9)
  • b10: ← b6
  • Plainb11 (+12)
  • b11: ← b10
    • v13 (13) = VarDef <mem> {~r0} v1
    • v14 (+13) = Store <mem> {int} v4 v11 v13
  • Ret v14 (+13)

short circuit [4858 ns]

  • b1:
    • v1 (?) = InitMem <mem>
    • v2 (?) = SP <uintptr>
    • v4 (?) = LocalAddr <*int> {~r0} v2 v1
    • v5 (?) = Const64 <int> [0]
    • v6 (?) = ConstBool <bool> [false]
    • v7 (?) = ConstBool <bool> [true]
    • v11 (?) = Const64 <int> [1]
    • v15 (?) = Const64 <int> [2]
  • If v6b4 b3 (+14)
  • b2: ← b9
    • v20 (18) = VarDef <mem> {~r0} v1
    • v21 (+18) = Store <mem> {int} v4 v5 v20
  • Ret v21 (+18)
  • b3: ← b1
  • If v7b7 b6
  • b4: ← b1
  • Plainb5 (+14)
  • b5: ← b4
    • v17 (15) = VarDef <mem> {~r0} v1
    • v18 (+15) = Store <mem> {int} v4 v15 v17
  • Ret v18 (+15)
  • b6: ← b3
  • If v6b10 b9
  • b7: ← b3
  • Plainb8 (+10)
  • b8: ← b7
    • v9 (11) = VarDef <mem> {~r0} v1
    • v10 (+11) = Store <mem> {int} v4 v5 v9
  • Ret v10 (+11)
  • b9: ← b6
  • Plainb2 (+9)
  • b10: ← b6
  • Plainb11 (+12)
  • b11: ← b10
    • v13 (13) = VarDef <mem> {~r0} v1
    • v14 (+13) = Store <mem> {int} v4 v11 v13
  • Ret v14 (+13)

decompose args [8151 ns]

  • b1:
    • v1 (?) = InitMem <mem>
    • v2 (?) = SP <uintptr>
    • v4 (?) = LocalAddr <*int> {~r0} v2 v1
    • v5 (?) = Const64 <int> [0]
    • v6 (?) = ConstBool <bool> [false]
    • v7 (?) = ConstBool <bool> [true]
    • v11 (?) = Const64 <int> [1]
    • v15 (?) = Const64 <int> [2]
  • If v6b4 b3 (+14)
  • b2: ← b9
    • v20 (18) = VarDef <mem> {~r0} v1
    • v21 (+18) = Store <mem> {int} v4 v5 v20
  • Ret v21 (+18)
  • b3: ← b1
  • If v7b7 b6
  • b4: ← b1
  • Plainb5 (+14)
  • b5: ← b4
    • v17 (15) = VarDef <mem> {~r0} v1
    • v18 (+15) = Store <mem> {int} v4 v15 v17
  • Ret v18 (+15)
  • b6: ← b3
  • If v6b10 b9
  • b7: ← b3
  • Plainb8 (+10)
  • b8: ← b7
    • v9 (11) = VarDef <mem> {~r0} v1
    • v10 (+11) = Store <mem> {int} v4 v5 v9
  • Ret v10 (+11)
  • b9: ← b6
  • Plainb2 (+9)
  • b10: ← b6
  • Plainb11 (+12)
  • b11: ← b10
    • v13 (13) = VarDef <mem> {~r0} v1
    • v14 (+13) = Store <mem> {int} v4 v11 v13
  • Ret v14 (+13)

decompose user [441 ns]

  • b1:
    • v1 (?) = InitMem <mem>
    • v2 (?) = SP <uintptr>
    • v4 (?) = LocalAddr <*int> {~r0} v2 v1
    • v5 (?) = Const64 <int> [0]
    • v6 (?) = ConstBool <bool> [false]
    • v7 (?) = ConstBool <bool> [true]
    • v11 (?) = Const64 <int> [1]
    • v15 (?) = Const64 <int> [2]
  • If v6b4 b3 (+14)
  • b2: ← b9
    • v20 (18) = VarDef <mem> {~r0} v1
    • v21 (+18) = Store <mem> {int} v4 v5 v20
  • Ret v21 (+18)
  • b3: ← b1
  • If v7b7 b6
  • b4: ← b1
  • Plainb5 (+14)
  • b5: ← b4
    • v17 (15) = VarDef <mem> {~r0} v1
    • v18 (+15) = Store <mem> {int} v4 v15 v17
  • Ret v18 (+15)
  • b6: ← b3
  • If v6b10 b9
  • b7: ← b3
  • Plainb8 (+10)
  • b8: ← b7
    • v9 (11) = VarDef <mem> {~r0} v1
    • v10 (+11) = Store <mem> {int} v4 v5 v9
  • Ret v10 (+11)
  • b9: ← b6
  • Plainb2 (+9)
  • b10: ← b6
  • Plainb11 (+12)
  • b11: ← b10
    • v13 (13) = VarDef <mem> {~r0} v1
    • v14 (+13) = Store <mem> {int} v4 v11 v13
  • Ret v14 (+13)

opt [11393 ns]

  • b1:
    • v1 (?) = InitMem <mem>
    • v2 (?) = SP <uintptr>
    • v4 (?) = LocalAddr <*int> {~r0} v2 v1
    • v5 (?) = Const64 <int> [0]
    • v6 (?) = ConstBool <bool> [false]
    • v7 (?) = ConstBool <bool> [true]
    • v11 (?) = Const64 <int> [1]
    • v15 (?) = Const64 <int> [2]
  • Firstb3 b4 (+14)
  • b2: ← b9
    • v20 (18) = VarDef <mem> {~r0} v1
    • v21 (+18) = Store <mem> {int} v4 v5 v20
  • Ret v21 (+18)
  • b3: ← b1
  • Firstb7 b6
  • b4: ← b1
  • Plainb5 (+14)
  • b5: ← b4
    • v17 (15) = VarDef <mem> {~r0} v1
    • v18 (+15) = Store <mem> {int} v4 v15 v17
  • Ret v18 (+15)
  • b6: ← b3
  • Firstb9 b10
  • b7: ← b3
  • Plainb8 (+10)
  • b8: ← b7
    • v9 (11) = VarDef <mem> {~r0} v1
    • v10 (+11) = Store <mem> {int} v4 v5 v9
  • Ret v10 (+11)
  • b9: ← b6
  • Plainb2 (+9)
  • b10: ← b6
  • Plainb11 (+12)
  • b11: ← b10
    • v13 (13) = VarDef <mem> {~r0} v1
    • v14 (+13) = Store <mem> {int} v4 v11 v13
  • Ret v14 (+13)

zero arg cse [4598 ns]

  • b1:
    • v1 (?) = InitMem <mem>
    • v2 (?) = SP <uintptr>
    • v4 (?) = LocalAddr <*int> {~r0} v2 v1
    • v5 (?) = Const64 <int> [0]
    • v6 (?) = ConstBool <bool> [false]
    • v7 (?) = ConstBool <bool> [true]
    • v11 (?) = Const64 <int> [1]
    • v15 (?) = Const64 <int> [2]
  • Firstb3 b4 (+14)
  • b2: ← b9
    • v20 (18) = VarDef <mem> {~r0} v1
    • v21 (+18) = Store <mem> {int} v4 v5 v20
  • Ret v21 (+18)
  • b3: ← b1
  • Firstb7 b6
  • b4: ← b1
  • Plainb5 (+14)
  • b5: ← b4
    • v17 (15) = VarDef <mem> {~r0} v1
    • v18 (+15) = Store <mem> {int} v4 v15 v17
  • Ret v18 (+15)
  • b6: ← b3
  • Firstb9 b10
  • b7: ← b3
  • Plainb8 (+10)
  • b8: ← b7
    • v9 (11) = VarDef <mem> {~r0} v1
    • v10 (+11) = Store <mem> {int} v4 v5 v9
  • Ret v10 (+11)
  • b9: ← b6
  • Plainb2 (+9)
  • b10: ← b6
  • Plainb11 (+12)
  • b11: ← b10
    • v13 (13) = VarDef <mem> {~r0} v1
    • v14 (+13) = Store <mem> {int} v4 v11 v13
  • Ret v14 (+13)

opt deadcode [4399 ns]

  • b1:
    • v1 (?) = InitMem <mem>
    • v2 (?) = SP <uintptr>
    • v4 (?) = LocalAddr <*int> {~r0} v2 v1
    • v5 (?) = Const64 <int> [0]
  • Plainb3 (+14)
  • b3: ← b1
  • Plainb7
  • b7: ← b3
  • Plainb8 (+10)
  • b8: ← b7
    • v9 (11) = VarDef <mem> {~r0} v1
    • v10 (+11) = Store <mem> {int} v4 v5 v9
  • Ret v10 (+11)

generic cse [13879 ns]

  • b1:
    • v1 (?) = InitMem <mem>
    • v2 (?) = SP <uintptr>
    • v4 (?) = LocalAddr <*int> {~r0} v2 v1
    • v5 (?) = Const64 <int> [0]
  • Plainb3 (+14)
  • b3: ← b1
  • Plainb7
  • b7: ← b3
  • Plainb8 (+10)
  • b8: ← b7
    • v9 (11) = VarDef <mem> {~r0} v1
    • v10 (+11) = Store <mem> {int} v4 v5 v9
  • Ret v10 (+11)

phiopt [342 ns]

  • b1:
    • v1 (?) = InitMem <mem>
    • v2 (?) = SP <uintptr>
    • v4 (?) = LocalAddr <*int> {~r0} v2 v1
    • v5 (?) = Const64 <int> [0]
  • Plainb3 (+14)
  • b3: ← b1
  • Plainb7
  • b7: ← b3
  • Plainb8 (+10)
  • b8: ← b7
    • v9 (11) = VarDef <mem> {~r0} v1
    • v10 (+11) = Store <mem> {int} v4 v5 v9
  • Ret v10 (+11)

nilcheckelim [9775 ns]

  • b1:
    • v1 (?) = InitMem <mem>
    • v2 (?) = SP <uintptr>
    • v4 (?) = LocalAddr <*int> {~r0} v2 v1
    • v5 (?) = Const64 <int> [0]
  • Plainb3 (+14)
  • b3: ← b1
  • Plainb7
  • b7: ← b3
  • Plainb8 (+10)
  • b8: ← b7
    • v9 (11) = VarDef <mem> {~r0} v1
    • v10 (+11) = Store <mem> {int} v4 v5 v9
  • Ret v10 (+11)

prove [21957 ns]

  • b1:
    • v1 (?) = InitMem <mem>
    • v2 (?) = SP <uintptr>
    • v4 (?) = LocalAddr <*int> {~r0} v2 v1
    • v5 (?) = Const64 <int> [0]
    • v14 (?) = Const64 <int64> [0]
  • Plainb3 (+14)
  • b3: ← b1
  • Plainb7
  • b7: ← b3
  • Plainb8 (+10)
  • b8: ← b7
    • v9 (11) = VarDef <mem> {~r0} v1
    • v10 (+11) = Store <mem> {int} v4 v5 v9
  • Ret v10 (+11)

fuse plain [1188 ns]

  • b1:
  • BlockInvalid (+14)
  • b3:
  • BlockInvalid
  • b7:
  • BlockInvalid (+10)
  • b8:
    • v1 (?) = InitMem <mem>
    • v2 (?) = SP <uintptr>
    • v4 (?) = LocalAddr <*int> {~r0} v2 v1
    • v5 (?) = Const64 <int> [0]
    • v14 (?) = Const64 <int64> [0]
    • v9 (11) = VarDef <mem> {~r0} v1
    • v10 (+11) = Store <mem> {int} v4 v5 v9
  • Ret v10 (+11)

decompose builtin [8319 ns]

  • b1:
  • BlockInvalid (+14)
  • b3:
  • BlockInvalid
  • b7:
  • BlockInvalid (+10)
  • b8:
    • v1 (?) = InitMem <mem>
    • v2 (?) = SP <uintptr>
    • v4 (?) = LocalAddr <*int> {~r0} v2 v1
    • v5 (?) = Const64 <int> [0]
    • v14 (?) = Const64 <int64> [0]
    • v9 (11) = VarDef <mem> {~r0} v1
    • v10 (+11) = Store <mem> {int} v4 v5 v9
  • Ret v10 (+11)

softfloat [266 ns]

  • b1:
  • BlockInvalid (+14)
  • b3:
  • BlockInvalid
  • b7:
  • BlockInvalid (+10)
  • b8:
    • v1 (?) = InitMem <mem>
    • v2 (?) = SP <uintptr>
    • v4 (?) = LocalAddr <*int> {~r0} v2 v1
    • v5 (?) = Const64 <int> [0]
    • v14 (?) = Const64 <int64> [0]
    • v9 (11) = VarDef <mem> {~r0} v1
    • v10 (+11) = Store <mem> {int} v4 v5 v9
  • Ret v10 (+11)

late opt [1055 ns]

  • b1:
  • BlockInvalid (+14)
  • b3:
  • BlockInvalid
  • b7:
  • BlockInvalid (+10)
  • b8:
    • v1 (?) = InitMem <mem>
    • v2 (?) = SP <uintptr>
    • v4 (?) = LocalAddr <*int> {~r0} v2 v1
    • v5 (?) = Const64 <int> [0]
    • v14 (?) = Const64 <int64> [0]
    • v9 (11) = VarDef <mem> {~r0} v1
    • v10 (+11) = Store <mem> {int} v4 v5 v9
  • Ret v10 (+11)

dead auto elim [2795 ns]

  • b1:
  • BlockInvalid (+14)
  • b3:
  • BlockInvalid
  • b7:
  • BlockInvalid (+10)
  • b8:
    • v1 (?) = InitMem <mem>
    • v2 (?) = SP <uintptr>
    • v4 (?) = LocalAddr <*int> {~r0} v2 v1
    • v5 (?) = Const64 <int> [0]
    • v14 (?) = Const64 <int64> [0]
    • v9 (11) = VarDef <mem> {~r0} v1
    • v10 (+11) = Store <mem> {int} v4 v5 v9
  • Ret v10 (+11)

generic deadcode [2734 ns]

  • b8:
    • v1 (?) = InitMem <mem>
    • v2 (?) = SP <uintptr>
    • v4 (?) = LocalAddr <*int> {~r0} v2 v1
    • v5 (?) = Const64 <int> [0]
    • v9 (11) = VarDef <mem> {~r0} v1
    • v10 (+11) = Store <mem> {int} v4 v5 v9
  • Ret v10 (+11)

check bce [227 ns]

  • b8:
    • v1 (?) = InitMem <mem>
    • v2 (?) = SP <uintptr>
    • v4 (?) = LocalAddr <*int> {~r0} v2 v1
    • v5 (?) = Const64 <int> [0]
    • v9 (11) = VarDef <mem> {~r0} v1
    • v10 (+11) = Store <mem> {int} v4 v5 v9
  • Ret v10 (+11)

branchelim [2862 ns]

  • b8:
    • v1 (?) = InitMem <mem>
    • v2 (?) = SP <uintptr>
    • v4 (?) = LocalAddr <*int> {~r0} v2 v1
    • v5 (?) = Const64 <int> [0]
    • v9 (11) = VarDef <mem> {~r0} v1
    • v10 (+11) = Store <mem> {int} v4 v5 v9
  • Ret v10 (+11)

fuse [348 ns]

  • b8:
    • v1 (?) = InitMem <mem>
    • v2 (?) = SP <uintptr>
    • v4 (?) = LocalAddr <*int> {~r0} v2 v1
    • v5 (?) = Const64 <int> [0]
    • v9 (11) = VarDef <mem> {~r0} v1
    • v10 (+11) = Store <mem> {int} v4 v5 v9
  • Ret v10 (+11)

dse [4899 ns]

  • b8:
    • v1 (?) = InitMem <mem>
    • v2 (?) = SP <uintptr>
    • v4 (?) = LocalAddr <*int> {~r0} v2 v1
    • v5 (?) = Const64 <int> [0]
    • v9 (11) = VarDef <mem> {~r0} v1
    • v10 (+11) = Store <mem> {int} v4 v5 v9
  • Ret v10 (+11)

writebarrier [3002 ns]

  • b8:
    • v1 (?) = InitMem <mem>
    • v2 (?) = SP <uintptr>
    • v4 (?) = LocalAddr <*int> {~r0} v2 v1
    • v5 (?) = Const64 <int> [0]
    • v9 (11) = VarDef <mem> {~r0} v1
    • v10 (+11) = Store <mem> {int} v4 v5 v9
  • Ret v10 (+11)

lower [31405 ns]

  • b8:
    • v1 (?) = InitMem <mem>
    • v2 (?) = SP <uintptr>
    • v4 (?) = LEAQ <*int> {~r0} v2
    • v5 (?) = MOVQconst <int> [0]
    • v9 (11) = VarDef <mem> {~r0} v1
    • v10 (+11) = MOVQstoreconst <mem> {~r0} [val=0,off=0] v2 v9
  • Ret v10 (+11)

lowered cse [3990 ns]

  • b8:
    • v1 (?) = InitMem <mem>
    • v2 (?) = SP <uintptr>
    • v4 (?) = LEAQ <*int> {~r0} v2
    • v5 (?) = MOVQconst <int> [0]
    • v9 (11) = VarDef <mem> {~r0} v1
    • v10 (+11) = MOVQstoreconst <mem> {~r0} [val=0,off=0] v2 v9
  • Ret v10 (+11)

elim unread autos [662 ns]

  • b8:
    • v1 (?) = InitMem <mem>
    • v2 (?) = SP <uintptr>
    • v4 (?) = LEAQ <*int> {~r0} v2
    • v5 (?) = MOVQconst <int> [0]
    • v9 (11) = VarDef <mem> {~r0} v1
    • v10 (+11) = MOVQstoreconst <mem> {~r0} [val=0,off=0] v2 v9
  • Ret v10 (+11)

lowered deadcode [1910 ns]

  • b8:
    • v1 (?) = InitMem <mem>
    • v2 (?) = SP <uintptr>
    • v9 (11) = VarDef <mem> {~r0} v1
    • v10 (+11) = MOVQstoreconst <mem> {~r0} [val=0,off=0] v2 v9
  • Ret v10 (+11)

checkLower [506 ns]

  • b8:
    • v1 (?) = InitMem <mem>
    • v2 (?) = SP <uintptr>
    • v9 (11) = VarDef <mem> {~r0} v1
    • v10 (+11) = MOVQstoreconst <mem> {~r0} [val=0,off=0] v2 v9
  • Ret v10 (+11)

late phielim [325 ns]

  • b8:
    • v1 (?) = InitMem <mem>
    • v2 (?) = SP <uintptr>
    • v9 (11) = VarDef <mem> {~r0} v1
    • v10 (+11) = MOVQstoreconst <mem> {~r0} [val=0,off=0] v2 v9
  • Ret v10 (+11)

late copyelim [240 ns]

  • b8:
    • v1 (?) = InitMem <mem>
    • v2 (?) = SP <uintptr>
    • v9 (11) = VarDef <mem> {~r0} v1
    • v10 (+11) = MOVQstoreconst <mem> {~r0} [val=0,off=0] v2 v9
  • Ret v10 (+11)

tighten [14668 ns]

  • b8:
    • v1 (?) = InitMem <mem>
    • v2 (?) = SP <uintptr>
    • v9 (11) = VarDef <mem> {~r0} v1
    • v10 (+11) = MOVQstoreconst <mem> {~r0} [val=0,off=0] v2 v9
  • Ret v10 (+11)

late deadcode [1671 ns]

  • b8:
    • v1 (?) = InitMem <mem>
    • v2 (?) = SP <uintptr>
    • v9 (11) = VarDef <mem> {~r0} v1
    • v10 (+11) = MOVQstoreconst <mem> {~r0} [val=0,off=0] v2 v9
  • Ret v10 (+11)

critical [451 ns]

  • b8:
    • v1 (?) = InitMem <mem>
    • v2 (?) = SP <uintptr>
    • v9 (11) = VarDef <mem> {~r0} v1
    • v10 (+11) = MOVQstoreconst <mem> {~r0} [val=0,off=0] v2 v9
  • Ret v10 (+11)

phi tighten [182 ns]

  • b8:
    • v1 (?) = InitMem <mem>
    • v2 (?) = SP <uintptr>
    • v9 (11) = VarDef <mem> {~r0} v1
    • v10 (+11) = MOVQstoreconst <mem> {~r0} [val=0,off=0] v2 v9
  • Ret v10 (+11)

likelyadjust [711 ns]

  • b8:
    • v1 (?) = InitMem <mem>
    • v2 (?) = SP <uintptr>
    • v9 (11) = VarDef <mem> {~r0} v1
    • v10 (+11) = MOVQstoreconst <mem> {~r0} [val=0,off=0] v2 v9
  • Ret v10 (+11)

layout [2026 ns]

  • b8:
    • v1 (?) = InitMem <mem>
    • v2 (?) = SP <uintptr>
    • v9 (11) = VarDef <mem> {~r0} v1
    • v10 (+11) = MOVQstoreconst <mem> {~r0} [val=0,off=0] v2 v9
  • Ret v10 (+11)

schedule [5037 ns]

  • b8:
    • v1 (?) = InitMem <mem>
    • v9 (11) = VarDef <mem> {~r0} v1
    • v2 (?) = SP <uintptr>
    • v10 (+11) = MOVQstoreconst <mem> {~r0} [val=0,off=0] v2 v9
  • Ret v10 (+11)

late nilcheck [1590 ns]

  • b8:
    • v1 (?) = InitMem <mem>
    • v9 (11) = VarDef <mem> {~r0} v1
    • v2 (?) = SP <uintptr>
    • v10 (+11) = MOVQstoreconst <mem> {~r0} [val=0,off=0] v2 v9
  • Ret v10 (+11)

flagalloc [1539 ns]

  • b8:
    • v1 (?) = InitMem <mem>
    • v9 (11) = VarDef <mem> {~r0} v1
    • v2 (?) = SP <uintptr>
    • v10 (+11) = MOVQstoreconst <mem> {~r0} [val=0,off=0] v2 v9
  • Ret v10 (+11)

regalloc [48167 ns]

  • b8:
    • v1 (?) = InitMem <mem>
    • v9 (11) = VarDef <mem> {~r0} v1
    • v2 (?) = SP <uintptr> : SP
    • v10 (+11) = MOVQstoreconst <mem> {~r0} [val=0,off=0] v2 v9
  • Ret v10 (+11)

loop rotate [1997 ns]

  • b8:
    • v1 (?) = InitMem <mem>
    • v9 (11) = VarDef <mem> {~r0} v1
    • v2 (?) = SP <uintptr> : SP
    • v10 (+11) = MOVQstoreconst <mem> {~r0} [val=0,off=0] v2 v9
  • Ret v10 (+11)

stackframe [3127 ns]

  • b8:
    • v1 (?) = InitMem <mem>
    • v9 (11) = VarDef <mem> {~r0} v1
    • v2 (?) = SP <uintptr> : SP
    • v10 (+11) = MOVQstoreconst <mem> {~r0} [val=0,off=0] v2 v9
  • Ret v10 (+11)

trim [431 ns]

  • b8:
    • v1 (?) = InitMem <mem>
    • v9 (11) = VarDef <mem> {~r0} v1
    • v2 (?) = SP <uintptr> : SP
    • v10 (+11) = MOVQstoreconst <mem> {~r0} [val=0,off=0] v2 v9
  • Ret v10 (+11)

genssa

# benchmark_test.go
00000 (8) TEXT "".switchImplementation(SB), ABIInternal
00001 (8) FUNCDATA $0, gclocals·33cdeccccebe80329f1fdbee7f5874cb(SB)
00002 (8) FUNCDATA $1, gclocals·33cdeccccebe80329f1fdbee7f5874cb(SB)
00003 (8) FUNCDATA $2, gclocals·33cdeccccebe80329f1fdbee7f5874cb(SB)
v10
00004 (+11) PCDATA $0, $0
v10
00005 (+11) PCDATA $1, $0
v10
00006 (+11) MOVQ $0, "".~r0(SP)
b8
00007 (11) RET
00008 (?) END